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Integrated Circuit Systems, Inc.
Product Data Sheet
M906-01
VCSO BASED GBE CLOCK GENERATOR
PIN ASSIGNMENT (9 x 9 mm SMT)
XTAL_1 / REF_IN GND STOP EXT_CLK EN_EXT_CLK NC nFOUT3 FOUT3 VCC XTAL_2 FOUT4 nFOUT4 FOUT5 nFOUT5 VCC DNC DNC DNC 27 26 25 24 23 22 21 20 19
GENERAL DESCRIPTION
The M906-01 is a PLL (Phase Locked Loop) based clock generator that uses an internal VCSO (Voltage Controlled SAW Oscillator) to produce a very low jitter output clock. It is ideal for Gigabit Ethernet. The output clock (frequency of 156.25 or 187.50MHz for example) is provided from six LVPECL clock output pairs. (Specify frequency at time of order.) The accuracy of the output frequency is assured by the internal PLL, which phase-locks the internal VCSO to the reference input frequency (25 or 30MHz for example). The input reference can either be an external crystal, utilizing the internal crystal oscillator, or a stable external clock source such as a packaged crystal oscillator.
28 29 30 31 32 33 34 35 36
M906-01
(Top View)
18 17 16 15 14 13 12 11 10
nFOUT2 FOUT2 nFOUT1 FOUT1 GND nFOUT0 FOUT0 VCC GND
FEATURES
Output clock frequency from 125MHz to 190MHz (Consult factory for frequency availability) Six identical LVPECL output pairs Integrated SAW (surface acoustic wave) delay line Low jitter 0.7ps RMS (over 12kHz-20MHz) Ideal for Gigabit Ethernet clock reference Output-to-output skew < 100ps External XTAL or LVCMOS reference input Selectable external feed-through clock input STOP clock control (Logic 1 stops output clocks) Industrial temperature grade available Single 3.3V power supply Small 9 x 9 mm SMT (surface mount) package Pb-free design/construction on all 9 x 9 mm modules
Figure 1: Pin Assignment
Example Output Frequency Configurations
Ref Clock Frequency (MHz) 20 25 30 25/4 PLL Ratio Output Frequency 1 (MHz) 125 156.25 187.50 Application
GND GND GND OP_IN nOP_OUT nVC VC OP_OUT nOP_IN
1 2 3 4 5 6 7 8 9
GbE 10GbE 12GbE
Table 1: Example Output Frequency Configurations
Note 1:Specify output clock frequency at time of order
SIMPLIFIED BLOCK DIAGRAM
M906-01-156.25
VSCO
External Crystal or Reference Clock Input
(e.g., 25 or 30MHz)
XTAL OSC
Divider
Frequency Multiplying PLL
O 1
LVPECL Output Clock Pairs
(e.g., 156.25 or 187.50MHz)
External Loop Filter
External Clock Input
External Clock Select
Output Clock STOP Control
Figure 2: Simplified Block Diagram
M906-01 Datasheet Rev 3.2
M906-01 VCSO Based GbE Clock Generator
Revised 15Jun2006
Communications Modules
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Integrated Circuit Systems, Inc.
M906-01
VCSO BASED GBE CLOCK GENERATOR
Product Data Sheet
DETAILED BLOCK DIAGRAM
RLOOP CLOOP RPOST CPOST CPOST RLOOP CLOOP OP_OUT RPOST nOP_OUT nVC VC
External Loop Filter Components
M906-01
Phase Detector
OP_IN
nOP_IN
XTAL_1 / REF_IN XTAL_2
RIN
SAW Delay Line
FOUT5 nFOUT5 FOUT4 nFOUT4
XTAL OSC
R Divider
R=4 RIN Loop Filter Amplifier Phase Shifter VCSO
FOUT3 nFOUT3
O
M Divider M = 25
Phase Locked Loop (PLL)
EXT_CLK EN_EXT_CLK
1
FOUT2 nFOUT2 FOUT1 nFOUT1 FOUT0 nFOUT0
STOP
Figure 3: Detailed Block Diagram
PIN DESCRIPTIONS
Number 1, 2, 3, 10, 14, 26 4 9 5 8 6 7 11, 19, 33 12 13 15 16 17 18 20 21 29 30 31 32 23 24 25 27 28 34, 35, 36 Name GND OP_IN nOP_IN nOP_OUT OP_OUT nVC VC VCC FOUT0 nFOUT0 FOUT1 nFOUT1 FOUT2 nFOUT2 FOUT3 nFOUT3 FOUT4 nFOUT4 FOUT5 nFOUT5 EN_EXT_CLK EXT_CLK STOP XTAL_1 / REF_IN XTAL_2 DNC I/O Configuration Description
Ground Input Output Input Power
Power supply ground connections. External loop filter connections. See Figure 5, External Clock Feed-through, on pg. 3. Power supply connection, connect to +3.3V.
Output
No internal terminator
Clock output pairs, differential LVPECL output (156.25 MHz for the M906-01-156.2500)
Input Input Input Input Input
Logic 1 enables the EXT_CLK input. Use Logic 0 for normal operation. External clock feed-through: 0 to 200 MHz 1 Logic 1 stops clock outputs. Internal pull-down resistor Use Logic 0 for normal operation. External crystal connection. Also accepts LVCMOS/LVTTL compatible clock source. External crystal connection. Leave unconnected when driving pin 27 with external clock reference. Do Not Connect. Internal pull-down resistor1
Table 2: Pin Descriptions
Note 1: For typical value of internal pull-down resistor, see DC Characteristics, Pull-down on pg. 6.
M906-01 Datasheet Rev 3.2
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M906-01
VCSO BASED GBE CLOCK GENERATOR
Product Data Sheet The PLL The PLL (Phase Locked Loop) includes the phase detector, the VCSO, a feedback divider (labeled "M Divider"), and a reference divider ("R Divider"). The feedback divider divides the VCSO output frequency by a fixed value "M" to match the reference frequency provided to the phase detector by the reference divider. By controlling the frequency and phase of the VCSO, the phase detector precisely locks the frequency and phase of the feedback divider output to that of the reference divider output. This creates an output frequency that is a multiple of the reference frequency (which is output from the VCSO). The relationship between the VCSO output frequency, the M Divider, the R Divider and the input reference frequency is defined as follows: M Fvcso = Fxtal x ---R For the M906-01-156.2500 (see "Ordering Information" on pg. 8): VCSO output frequency = 156.25MHz Input reference frequency = 25MHz M=25 R= 4 Therefore, for the M906-01-156.2500:
FUNCTIONAL DESCRIPTION
The M906-01 is a PLL (Phase Locked Loop) based clock generator that generates output clocks synchronized to an input reference clock. The M906-01 combines the flexibility of a VCSO (Voltage Controlled SAW Oscillator) with the stability of a crystal oscillator. Input Reference The input reference can either be an external, discrete crystal device or a stable external clock source such as a packaged crystal oscillator:
* If an external crystal is used with the on-chip crystal
oscillator circuit (XTAL OSC), the external crystal should be a parallel-resonant, fundamental mode crystal. Apply it to the XTAL_1 / REF_IN and XTAL_2 input pins. External crystal load capacitors are also required. * If an external LVCMOS/LVTTL clock source is used, apply it to the XTAL_1 / REF_IN input pin. In either case, the reference clock is supplied to the phase detector of the PLL. The M906-01 includes a reference divider that divides the input reference frequency by a fixed value "R" and provides the result to the phase detector.
The EX_CLK pin is available for a clock feed-through mode for testing. See "External Clock Feed-through" on pg. 3.
* * * *
25 156.25MHz = 25MHz x --------4 M The product of the input crystal frequency and ---R falls within the lock range of the VCSO.
External Clock Feed-through The EXT_CLK pin provides an input for an external single-ended clock that directly drives the LVPECL clock outputs. It can be used for system debugging and performance evaluation. 1. Set pin EN_EXT_CLK to Logic 1. 2. Apply an external LVCMOS/LVTTL clock source to the EXT_CLK input pin.
Due to the fact that EXT_CLK bypasses the PLL, any frequency between DC and 200MHz can be used.
STOP Clock The STOP pin puts the output clock into a static condition. Logic 1 Output clocks are static Logic 0 Output clocks enabled for normal operation
M906-01 Datasheet Rev 3.2
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M906-01
VCSO BASED GBE CLOCK GENERATOR
Product Data Sheet External Loop Filter To provide stable PLL operation, and thereby a low jitter output clock, the M906-01 requires the use of an external loop filter. This is provided via the provided filter pins (see Figure 5). Due to the differential signal path design, the implementation requires two identical complementary RC filters as shown here.
RLOOP CLOOP RPOST CPOST CPOST RLOOP OP_IN
4 9
APPLICATION INFORMATION
This section includes information on the optional external crystal and on the external loop filter. The subsections on the loop filter provide example component values and also briefly describe the SAW PLL simulator tool and additional application information available at www.icst.com. External Crystal Specifications If an external crystal is used with the on-chip crystal oscillator circuit (XTAL OSC), the external crystal should have the following general specifications: Crystal Specifications
Parameter Min Typ Max Unit AT-cut quartz Fundamental 16 40 50 32 1.0
CLOOP OP_OUT
8 5
RPOST nOP_OUT nVC
6 7
f0
ESR
Crystal Type Mode of Oscillation Frequency Range
nOP_IN
VC
MHz
Figure 5: External Clock Feed-through
CL P0
Equivalent Series Resistance Spurious Response (non-harmonic) Load Capacitance, 16 parallel load resonant 0.1 Drive Level
-40 dBc pF mW
Example External Loop Filter Component Values
PLL Band- Damping R loop (k) width (kHz) Factor 0.5 1.5 1 2.1 2 6.4 10.6
3
C loop (F) 4.70 1.00 0.10 0.10 0.033
R post (k) 20 10 10 20 20
C post (pF) 1500 1500 1500 270 120
Table 3: Crystal Specifications
3.0 3.3 1.1 4.5 4.2
1.5 4.7 4.7 20.0 33.0
The external crystal will be applied to the XTAL_1 / REF_IN and XTAL_2 input pins. External crystal load capacitors are also required.
Recommended External Crystal Configuration M906-01 M9xx-0x
XTAL_1 / REF_IN
C1
Table 4: Example External Loop Filter Component Values
XTAL XTAL_2
C2
XTAL OSC
Note 1: Optimum loop bandwidth when using an external reference crystal. Will help to attenuate interference on the crystal's sinusoidal clock waveform and therefore will minimize device output clock jitter. Note 2: Alternative loop filter setting when using an external reference crystal. Smaller C loop lowers loop damping factor with negligible increase in output jitter. Note 3: Optimum loop bandwidth when using an external reference crystal oscillator. The square wave clock reference does not require as much jitter attenuation, which allows for a wider loop bandwidth and improved system noise tolerance.
Figure 4: Recommended External Crystal Configuration
XTAL= 25 or 30 MHz, Load Capacitance Specification = 18 pF C1 = 27 pF C2 = 33 pF External load capacitors C1 and C2 present a load of 15 pf to the crystal (they are seen in series by the crystal through the common ground connection). With the additional of PCB trace capacitance and M906-01 input capacitance, the total load to the crystal is about 18 pf.
Refer to the M906-01 product web page at www.icst.com/products/summary/M906-01.htm for additional product information.
M906-01 Datasheet Rev 3.2
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PLL Simulator Tool Available A free PC software utility is available on the ICS website (www.icst.com). The M2000 Timing Modules PLL Simulator is a downloadable application that simulates PLL jitter and wander transfer characteristics. This enables the user to set appropriate external loop component values in a given application.
Refer to the SAW PLL Simulator Software web page at www.icst.com/products/calculators/m2000filterSWdesc.htm for additional information.
M906-01
VCSO BASED GBE CLOCK GENERATOR
Product Data Sheet SAW PLL Application Notes Available The ICS web site also has application notes on:
* PCB layout guidelines (including special detailed * * *
instructions for preventing issues such as external reference crosstalk) Any new special device application details that may become available Instructions for using PLL simulator software Guidelines for PCB fabrication (inc. recommended PCB footprint, solder mask, and furnace profile)
Refer to the SAW PLL Application Notes web page at www.icst.com/products/appnotes/SawPllAppNotes.htm for application notes and any additional product information that may become available.
ABSOLUTE MAXIMUM RATINGS1
Symbol Parameter Rating Unit
VI VO IO VCC TS
Input Voltage Output Voltage Output Current Power Supply Voltage Storage Temperature
-0.5 to VCC +0.5 -0.5 to VCC +0.5
22 4.6
V V mA V
oC
-45 to +100
Table 5: Absolute Maximum Ratings
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in Recommended Conditions of Operation, DC Characteristics, or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
RECOMMENDED CONDITIONS OF OPERATION
Symbol Parameter Min 3.135 Typ 3.3 Max 3.465 Unit
VCC TA
Positive Supply Voltage Ambient Operating Temperature Commercial Industrial
V
o o
0 -40
+70 +85
C C
Table 6: Recommended Conditions of Operation
M906-01 Datasheet Rev 3.2
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M906-01
VCSO BASED GBE CLOCK GENERATOR
Product Data Sheet
ELECTRICAL SPECIFICATIONS
DC Characteristics
Unless stated otherwise, VCC = 3.3V +5%,TA = 0 oC to +70 oC (commercial)1, TA = -40 oC to +85 oC (industrial)1, Output Frequency=156.25MHz1, LVPECL outputs terminated with 50 to VCC - 2V
Symbol Parameter
Min 3.135
Typ 3.3 350
Max 3.465
Unit
Power Supply
VCC ICC
Positive Supply Voltage Power Supply Current Input High Voltage Input Low Voltage Input High Current Input Low Current Input High Voltage Input Low Voltage Input High Current Input Low Current Input Capacitance, All Inputs
EN_EXT_CLK, EXT_CLK, STOP, XTAL_1 / REF_IN EN_EXT_CLK, STOP XTAL_1 / REF_IN (XTAL_2 disconnected) EN_EXT_CLK, EXT_CLK, STOP
V mA
Logic Inputs
VIH VIL IIH IIL
2
Vcc +0.3 0.8 150
V V A A V A A
-0.3 -5.0
(Vcc / 2 ) +0.5
Reference Clock Input
VIH VIL IIH IIL
Vcc +0.3 150
-0.3 -5.0
(Vcc / 2 ) -0.5 V
All Inputs Pull-down Differential Output
CIN
4 51
pF k
Rpulldown Internal Pull-down Resistor VOH VOL VP-P Output High Voltage Output Low Voltage Peak to Peak Output Voltage
Vcc -1.4
FOUT, nFOUT (0-5)
Vcc -1.0 Vcc -1.7
0.85
V V V
Vcc -2.0
0.5
Note 1: See Ordering Information on pg. 8
Table 7: DC Characteristics
AC Characteristics
Unless stated otherwise, VCC = 3.3V +5%,TA = 0 oC to +70 oC (commercial)1, TA = -40 oC to +85 oC (industrial)1, Output Frequency=156.25MHz1, LVPECL outputs terminated with 50 to VCC - 2V
Symbol Parameter
Min 125
Typ 156.25 25
Max 190
Unit
Test Conditions
FOUT FIN APR n
Output Frequency Range Nominal Input Frequency, XTAL_1 / REF_IN VCSO Pull-Range Single Side Band Phase Noise @156.25MHz Jitter (rms) Output Duty Cycle, High Time Output Rise Time Output Fall Time Output Skew
EXT_CLK Frequency FOUT, nFOUT (0-1) FOUT, nFOUT (0-1) 1kHz Offset 10kHz Offset 100kHz Offset
MHz MHz ppm dBc/Hz dBc/Hz dBc/Hz ps % ps ps ps MHz
Table 8: AC Characteristics
100
150 -90 -110 -135
0.7 1.0 55 550 550 100
J(t) tDC tR tF tS
12kHz to 20MHz
45 350 350
50 450 450
20% to 80% 20% to 80%
Between Any Pair
EXT_CLK 0
200
M906-01 Datasheet Rev 3.2
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Note 1: See Ordering Information on pg. 8
M906-01
VCSO BASED GBE CLOCK GENERATOR
Product Data Sheet
DEVICE PACKAGE - 9 x 9mm CERAMIC LEADLESS CHIP CARRIER
Mechanical Dimensions:
Refer to the SAW PLL application notes web page at www.icst.com/products/appnotes/SawPllAppNotes.htm for application notes, including recommended PCB footprint, solder mask, and furnace profile.
Figure 6: Device Package - 9 x 9mm Ceramic Leadless Chip Carrier
M906-01 Datasheet Rev 3.2
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Product Data Sheet
M906-01
VCSO BASED GBE CLOCK GENERATOR
ORDERING INFORMATION
Part Numbering Scheme Part Number:
Device Number Temperature " - " = 0 to +70 oC (commercial) I = - 40 to +85 oC (industrial) Output Frequency (MHz) See Table 8, right. Consult ICS for other frequencies.
Example Part Numbers
M906- 01 - xxx.xxxx
Output Freq. (MHz) 156.25 156.25 187.50
Temperature
Order Part Number M906-01 - 156.2500 M906-01I156.2500 M906-01 - 156.2500 M906-01I156.2500 M906-01 - 187.5000 M906-01I187.5000
Figure 7: Part Numbering Scheme
commercial industrial commercial industrial commercial industrial
Table 9: Example Part Numbers
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. M906-01 Datasheet Rev 3.2 Integrated Circuit Systems, Inc.
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